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TS27L2C,I,M
LOW POWER CMOS DUAL OPERATIONAL AMPLIFIERS
.ULTRALOWCONSUMPTI .OUTPUT .EXCELLENTPHASEMARGI .STABLEANDLOWOFFSETVOLTAGE .THREEI
VOLTAGE GROUND N ON CAPACITIVE LOADS NPUT OFFSET VOLTAGE SELECTIONS
ON : 10A/op CAN SWING
TO
N DIP8 (Plastic Package)
D SO8 (Plastic Micropackage)
P TSSOP8 (Thin Shrink Small Outline Package)
ORDER CODES
Part Number TS27L2C/AC/BC TS27L2I/AI/BI Temperature Range 0oC, +70oC -40 C, +125 C -55 C, +125 C
o o o o
Package N
q q q
D
q q q
P
q q q
DESCRIPTION The TS272 series are low cost, low power dual operational amplifiers designed to operate with single or dual supplies. These operational amplifiers use the SGS-THOMSONsilicon gate CMOS process allowing an excellent consumption-speed ratio. These series are ideally suited for low consumption applications. Threepower consumptionsare available allowing to have always the best consumption-speedratio : l ICC = 10mA/amp. : TS27L2 (very low power) l ICC= 150mA/amp. : TS27M2(low power) l ICC= 1mA/amp. : TS272 (high speed) These CMOS amplifiers offer very high input impedance and extremely low input currents. The major advantageversus JFET devices is the very low input currents drift with temperature (see figure 2).
June 1998
TS27L2M/AM/BM
Example : TS27L2ACN
PIN CONNECTIONS (top view)
1 2 3 4 + +
8 7 6 5
1 - Output 1 2 - InvertingInput 1 3 - Non-inverting Input 1 4 -V
CC
5 - Non-inverting Input 2 6 - InvertingInput 2 7 - Output 2 + 8 -V
CC
1/9
TS27L2C,I,M
BLOCK DIAGRAM
VCC
Current source
xI
Input differential
Second stage
Output stage
Output
VCC
E
E
MAXIMUM RATINGS
Symbol VCC+ Vid Vi IO Iin Toper Supply Voltage - (note 1) Differential Input Voltage - (note 2) Input Voltage - (note 3) Output Current for VCC+ 15V Input Current Operating Free-Air Temperature Range TS27L2C/AC/BC TS27L2I/AI/BI TS27L2M/AM/BM Storage Temperature Range Parameter Value 18 18 -0.3 to 18 30 5 0 to +70 -40 to +125 -55 to +125 -65 to +150
o
Unit V V V mA mA
o
C
Tstg
C
N ot es : 1.All vol tage val ues, except di ffer ential vol tage, are wi th respect to network ground t erminal. 2.Differ enti al vol tages are at the non-inver ti ng input termi nal with r espect to the i nvert ing input termi nal. 3.The magnitude of t he input and the output voltages must never exceed the magnitude of the posit ive supply voltage.
OPERATING CONDITIONS
Symbol VCC+ Vicm Supply Voltage Common Mode Input Voltage Range Parameter 0 to Value 3 to 16
+ VCC
Unit V V - 1.5
2/9
VCC
T 27 T5 T6 T8 T28 T1 T2 T11 T 12 T 10 T 26
T 24
T 25
T 15
SCHEMATIC DIAGRAM (for 1/2 TS27L2)
R2
Input R1 C1
Input
T 17
T18
T7
Output
T 19
T 23
T3
T4
T16
T 20
T 22 T 29
T9
T 13
T 14
T21
VCC
TS27L2C,I,M
3/9
TS27L2C,I,M
ELECTRICAL CHARACTERISTICS VCC+ = +10V, VCC- = 0V, Tamb = 25oC (unless otherwise specified)
Symbol Vio Parameter Input Offset Voltage VO = 1.4V, Vic = 0V Tmin. Tamb Tmax. TS27L2C/AC/BC Min. TS27L2C/I/M TS27L2AC/AI/AM TS27L2BC/BI/BM TS27L2C/I/M TS27L2AC/AI/AM TS27L2BC/BI/BM Typ. 1.1 0.9 0.25 Max. 10 5 2 12 6.5 3 TS27L2I/AI/BI TS27L2M/AM/BM Min. Typ. 1.1 0.9 0.25 Max. mV 10 5 2 12 6.5 3.5 V/ C pA 1 100 1 150 8.8 8.7 9 8.8 8.6 50 60 45 100 60 40 100 MHz 0.1 0.1 dB 65 60 80 80 10 15 17 65 60 80 dB 80 10 15 18 A 9 mV 50 V/mV 1 300 V 1 200 pA
o
Unit
DV io Iio
Input Offset Voltage Drift Input Offset Current - (note 1) Vic = 5V, Vo = 5V Tmin. Tamb Tmax. Input Bias Current - (note 1) Vic = 5V, Vo = 5V Tmin. Tamb Tmax. High Level Output Voltage Vid = 100mV, R L = 1M Tmin. Tamb Tmax. Low Level Output Voltage Vid = -100mV Large Signal Voltage Gain Vo = 1V to 6V, RL = 1M, Vic = 5V Tmin. Tamb Tmax. Gain Bandwidth Product Av = 40dB, RL = 1M, C L = 100pF fin = 100kHz Common Mode Rejection Ratio Vo = 1.4V, Vic = 1V to 7.4V Supply Voltage Rejection Ratio + VCC = 5V to 10V ,Vo = 1.4V Supply Current (per amplifier) Av = 1, no load, Vo = 5V Tmin. Tamb Tmax. Output Short Circuit Current Vid = 100mV, V o = 0V Output Sink Current Vid = -100mV, V o = VCC Slew-Rate at Unity Gain R L = 1M, CL= 100pF, Vi = 3 to 7V Phase Margin at Unity Gain Av = 40dB, RL = 1M, C L= 100pF Overshoot Factor Equivalent Input Noise Voltage f = 1kHz, RS = 100 Channel Separation
0.7
0.7
Iib
VOH
VOL Avd
GBP
CMR SVR ICC
Io Isink SR m Kov en VO1/VO2
N ote :
mA 60 45 0.04 45 30 68 120 60 mA 45 V/s 0.04 Degrees 45 30 68 120 % nV Hz dB
1.Maxi mum val ues includi ng unavoidable i naccuracies of t he industr ial t est.
4/9
TS27L2C,I,M
TYPICAL CHARACTERISTICS Figure 1 : Supply Current (each amplifier) versus Supply Voltage
20
SUPPLY CURRENT, ICC ( A)
INPUT BIAS CURRENT, IIB (pA)
Figure 2 : Input Bias Current versus Free Air Temperature
100
15
TAMB = 25 C AV = 1 VO = VCC / 2
VCC = 10V V i = 5V
10
10
5
1
0
4
8
12
16
25
50
75
100
125
SUP PLY VOLTAGE, V (V) CC
TEMPERATURE, TAMB (C)
Figure 3a : High Level Output Voltage versus High Level Output Current
5
Figure 3b : High Level Output Voltage versus High Level Output Current
20
OUTPUT VOL TAGE, VOH (V) TAMB = 25C VID = 100mV VCC = 16V
OUTPUT VOLTAGE, VOH (V)
4 3 2 1 0
TAMB = 25 C V ID = 100mV VCC = 5V
16 12 8 4 0 -50
VCC = 10V
VCC = 3V
-10
-8
-6
-4
-2
0
-40
-30
-20
-10
0
OUTPUT CURRE NT, I OH (mA)
OUTPUT CURRENT, I OH (mA)
Figure 3a : Low Level Output Voltage versus Low Level Output Current
OUTPUT VOLTAGE, V OL (V) 1.0 0.8 0.6 0.4 0.2 T a mb = 25 C Vic = 0.5V V = -100mV
id
Figure 3b : Low Level Output Voltage versus Low Level Output Current
OUTPUT VOLTAGE, VOL (V) 3 VCC = 10V VCC = 16V
V CC = 3V
V CC = 5V
2
1 T a mb = 25 C V i = 0.5V V = -100mV
id
0
1 2 OUTPUT CURRENT, I OL (mA)
3
0
4 8 12 16 OUTPUT CURRENT, I OL (mA)
20
5/9
TS27L2C,I,M
TYPICAL CHARACTERISTICS (continued) Figure 5 : Open Loop Frequency Response and Phase Shift
50 40 GAIN GAIN (dB) 30 20 10 0 -10 10
2
Figure 6 : Gain Bandwidth Product versus Supply Voltage
GAIN BANDW. PROD., GBP (MHz) 120 100 80 60 40 T amb = 25 C R L = 1M C L = 100pF AV = 1
0 45
P ha s e Margin
P HASE Ta mb = 25 C VCC+ = 10V R L = 1M C L = 100pF A VCL = 100 10
3 4
90 135
Ga in Ba ndwidth P roduct 5 6
180
10 10 10 FREQUENCY, f (Hz)
10
7
PHASE (Degrees)
0
4
8
12
16
S UP P LYVOLTAGE, VCC (V)
Figure 7 : Phase Margin versus Supply Voltage
m (Degrees) 60 T a mb = 25 C R L = 1M C = 10 0pF AL = 1 V
Figure 8 : Phase Margin versus Capacitive Load
PHASE MARGIN, m (Degrees) 80 70 60 50 40 0 20 40 60 80 10 0 CAPACITANCE, C L (pF) Ta mb = 25 C R L = 1M AV = 1 VCC = 10V
50
MARGIN, PHASE
40
30 0 4 8 12 SUP P LY VOLTAGE, VCC (V) 16
Figure 9 : Slew Rate versus Supply Voltage
0.05
Figure 10 : Input Voltage Noise versus Frequency
EQUIVALENT INPUT NOISE VOLTAGE (nV/VHz)
300
SLEW RATES, SR (V/s)
Ta mb = 25 C R L = 1M C = 100pF
L
SR
VCC = 10V Tamb= 25 C
200
0.04 SR
R S = 100
0.03
100
0.02 4 6 8 10 12 14 S UP P LY VOLTAGE, V CC (V) 16
0 1
100 10 FREQUENCY (Hz)
1000
6/9
TS27L2C,I,M
PACKAGE MECHANICAL DATA 8 PINS - PLASTIC DIP
Dimensions A a1 B b b1 D E e e3 e4 F i L Z
Min. 0.51 1.15 0.356 0.204 7.95
Millimeters Typ. 3.32
Max.
Min. 0.020 0.045 0.014 0.008 0.313
Inches Typ. 0.131
Max.
1.65 0.55 0.304 10.92 9.75 2.54 7.62 7.62 6.6 5.08 3.81 1.52
0.065 0.022 0.012 0.430 0.384 0.100 0.300 0.300 0260 0.200 0.150 0.060
3.18
0.125
7/9
DIP8.TBL
PM-DIP8.EPS
TS27L2C,I,M
PACKAGE MECHANICAL DATA 8 PINS - PLASTIC MICROPACKAGE (SO)
Dimensions A a1 a2 a3 b b1 C c1 D E e e3 F L M S
Min. 0.1 0.65 0.35 0.19 0.25 4.8 5.8
Millimeters Typ.
Max. 1.75 0.25 1.65 0.85 0.48 0.25 0.5 45 (typ.) 5.0 6.2
o
Min. 0.004 0.026 0.014 0.007 0.010 0.189 0.228
Inches Typ.
Max. 0.069 0.010 0.065 0.033 0.019 0.010 0.020 0.197 0.244
1.27 3.81 3.8 0.4 4.0 1.27 0.6 8 (max.)
o
0.050 0.150 0.150 0.016 0.157 0.050 0.024
8/9
SO8.TBL
PM-SO8.EPS
TS27L2C,I,M
PACKAGE MECHANICAL DATA 8 PINS - THIN SHRINK SMALL OUTLINE PACKAGE
Dim. A A1 A2 b c D E E1 e k l
Millimeters Min. 0.05 0.80 0.19 0.09 2.90 4.30 0
o
Inches Max. 1.20 0.15 0.01 0.031 0.007 0.003 0.114 0.169 0
o
Typ.
Min.
Typ.
Max. 0.05 0.006
1.00
1.05 0.30 0.20
0.039
0.041 0.15 0.012
3.00 6.40 4.40 0.65
3.10 4.50 8
o
0.118 0.252 0.173 0.025
0.122 0.177 8
o
0.50
0.60
0.75
0.09
0.0236
0.030
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this pub lication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. (c) The ST log o is a trademark of STMicroelectronics (c) 1998 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - France - Germany - Italy - Japan - Korea - Malaysia - Malta - Mexico - Morocco The Netherlands - Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdo m - U.S.A.
ORDER CODE :
9/9


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